Bach­e­lor’s The­sis / Mas­ter’s The­sis / Stu­dent Re­search Pro­ject

Ab­stract

Ul­tra­Trail is an AI hard­ware ac­cel­er­a­tor for near-sen­sor sig­nal pro­cess­ing on edge de­vices. Its scal­able hard­ware ar­chi­tec­ture al­lows a fast spe­cial­iza­tion to var­i­ous ap­pli­ca­tion do­mains (e.g., au­to­mo­tive, med­ical, ro­bot­ics). The ac­cel­er­a­tor is writ­ten in the hard­ware de­scrip­tion lan­guage (HDL) Sys­temVer­ilog and has been im­ple­mented as both FPGA and ASIC. The hard­ware is ac­com­pa­nied by a soft­ware stack based on the deep learn­ing com­piler TVM that pro­vides a de­ploy­ment so­lu­tion to map AI work­loads to the ac­cel­er­a­tor.

Pos­si­ble the­sis top­ics are rang­ing from soft­ware so­lu­tions to hard­ware ex­ten­sions for the AI ac­cel­er­a­tor.

Ref­er­ences

• Paper: “Ul­tra­Trail: A Con­fig­urable Ul­tra-Low Power TC-ResNet AI Ac­cel­er­a­tor for Ef­fi­cient Key­word Spot­ting”
• Paper: “Hard­ware Ac­cel­er­a­tor and Neural Net­work Co-Op­ti­miza­tion for Ul­tra-Low-Power Audio Pro­cess­ing De­vices”
• Paper: “Com­piler-aware AI Hard­ware De­sign for Edge De­vices”
• TVM
• Sys­temVer­ilog

Re­quire­ments

• Python
• Linux and Git
• Sys­temVer­ilog (rec­om­mended)
• Un­der­stand­ing of deep neural net­works
• Un­der­stand­ing of com­puter ar­chi­tec­tures
• Suc­cess­fully at­teded the lec­ture “Grund­la­gen der Rech­ner­ar­chitek­tur” (rec­om­mended)
• Suc­cess­fully at­teded the lec­ture “Dig­i­tal De­sign and Syn­the­sis of Em­bed­ded Sys­tems” (rec­om­mended)
• Suc­cess­fully at­teded the lec­ture “Ef­fi­cient Ma­chine Learn­ing in Hard­ware” (rec­om­mended)

Con­tact

Palom­ero Bernardo, Paul

Bring­mann, Oliver